; REV. 2.0 Apr 11, 1988 P0 DATA 080H ;PORT 0 SP DATA 081H ;STACK POINTER DPL DATA 082H ;DATA POINTER - LOW BYTE DPH DATA 083H ;DATA POINTER - HIGH BYTE PCON DATA 087H ;POWER CONTROL TCON DATA 088H ;TIMER CONTROL TL DATA 08AH ;TIMER 0 - LOW BYTE RTL DATA 08BH ;TIMER 0 - LOW BYTE RELOAD TH DATA 08CH ;TIMER 0 - HIGH BYTE RTH DATA 08DH ;TIMER 0 - HIGH BYTE RELOAD P1 DATA 090H ;PORT 1 I2CON DATA 098H ;I2C CONTROL I2DAT DATA 099H ;I2C DATA IE DATA 0A8H ;INTERRUPT ENABLE P3 DATA 0B0H ;PORT 3 PSW DATA 0D0H ;PROGRAM STATUS WORD I2CFG DATA 0D8H ;I2C CONFIGURATION ACC DATA 0E0H ;ACCUMULATOR B DATA 0F0H ;MULTIPLICATION REGISTER I2STA DATA 0F8H ;I2C INTERNAL STATUS SCL BIT 080H ;P0.0 - I2C SERIAL CLOCK SDA BIT 081H ;P0.1 - 12C SERIAL DATA IT1 BIT 088H ;TCON.0 - EXT. INTERRUPT 1 TYPE IE1 BIT 089H ;TCON.1 - EXT. INTERRUPT 1 EDGE FLAG IT0 BIT 08AH ;TCON.2 - EXT. INTERRUPT 0 TYPE IE0 BIT 08BH ;TCON.3 - EXT. INTERRUPT 0 EDGE FLAG TR BIT 08CH ;TCON.4 - TIMER 0 ON/OFF CONTROL TF BIT 08DH ;TCON.5 - TIMER 0 OVERFLOW FLAG CT BIT 08EH ;TCON.6 - TIMER 1 ON/OFF CONTROL GATE BIT 08FH ;TCON.7 - TIMER 1 OVERFLOW FLAG INT0 BIT 095H ;P1.5 - EXTERNAL INTERRUPT 0 INPUT INT1 BIT 096H ;P1.6 - EXTERNAL INTERRUPT 1 INPUT T0 BIT 097H ;P1.7 - TIMER 0 COUNT INPUT EX0 BIT 0A8H ;IE.0 - EXTERNAL INTERRUPT 0 ENABLE ET0 BIT 0A9H ;IE.1 - TIMER 0 INTERRUPT ENABLE EX1 BIT 0AAH ;IE.2 - EXTERNAL INTERRUPT 1 ENABLE ETI BIT 0ABH ;IE.3 - TIMER 1 INTERRUPT ENABLE EI2 BIT 0ACH ;IE.4 - SERIAL PORT INTERRUPT ENABLE EA BIT 0AFH ;IE.7 - GLOBAL INTERRUPT ENABLE P BIT 0D0H ;PSW.0 - ACCUMULATOR PARITY FLAG OV BIT 0D2H ;PSW.2 - OVERFLOW FLAG RS0 BIT 0D3H ;PSW.3 - REGISTER BANK SELECT 0 RS1 BIT 0D4H ;PSW.4 - REGISTER BANK SELECT 1 F0 BIT 0D5H ;PSW.5 - FLAG 0 AC BIT 0D6H ;PSW.6 - AUXILIARY CARRY FLAG CY BIT 0D7H ;PSW.7 - CARRY FLAG MASTER BIT 099H ;I2CON.1 - READ MASTER OR SLAVE STP BIT 09AH ;I2CON.2 - READ STOP STR BIT 09BH ;I2CON.3 - READ START ARL BIT 09CH ;I2CON.4 - READ ARBITRATION LOSS DRDY BIT 09DH ;I2CON.5 - READ DATA READY ATN BIT 09EH ;I2CON.6 - READ ATTENTION RDAT BIT 09FH ;I2CON.7 - READ RECEIVE DATA XSTP BIT 098H ;I2CON.0 - WRITE XMIT STOP XSTR BIT 099H ;I2CON.1 - WRITE XMIT REPEATED START CSTP BIT 09AH ;I2CON.2 - WRITE CLEAR STOP CSTR BIT 09BH ;I2CON.3 - WRITE CLEAR START CARL BIT 09CH ;I2CON.4 - WRITE CLEAR ARBITRATION LOSS CDR BIT 09DH ;I2CON.5 - WRITE CLEAR DATA READY IDLE BIT 09EH ;I2CON.6 - WRITE GO IDLE CXA BIT 09FH ;I2CON.7 - WRITE CLEAR XMIT ACTIVE CT0 BIT 0D8H ;I2CFG.0 - TIMING BIT CT1 BIT 0D9H ;I2CFG.1 - TIMING BIT TIRUN BIT 0DCH ;I2CFG.4 - ENABLE/DISABLE TIMER 1 CLRTI BIT 0DDH ;I2CFG.5 - CLEAR TIMER 1 INTERRUPT FLAG MASTRQ BIT 0DEH ;I2CFG.6 - REQUEST MASTERSHIP OF I2C SLAVEN BIT 0DFH ;I2CFG.7 - ENABLE I2C SLAVE FUNCTIONALITY RSTP BIT 0F8H ;I2STA.0 - READ - TRANSMIT STOP CONDITION RSTR BIT 0F9H ;I2STA.1 - READ - TRANSMIT REPEATED START CONDITION MAKSTP BIT 0FAH ;I2STA.2 - READ - STOP CONDITION MAKSTR BIT 0FBH ;I2STA.3 - READ - START CONDITION XACTV BIT 0FCH ;I2STA.4 - READ - TRANSMITTER ACTIVE XDATA BIT 0FDH ;I2STA.5 - READ - CONTENT OF TRANSMITTER BUFFER RIDLE BIT 0FEH ;I2STA.6 - READ - SLAVE IDLE FLAG