@@LLSYSREQ
      The LogicLab 2000 requires an IBM compatible personal computer as the
host.  This computer must be operation under MS-DOS 2.0 or later and have
at the least the following:
      - one serial port configured for RS-232 protocol;
      - at least 512 kbytes of RAM free to the Logic Lab;
      _ one 360 kbyte floppy drive & a hard disk or one 1.2  mbyte floppy;
@@LLQUICK
To begin using the LogicLab 2000 System immediately do the followingsteps
in the order presented.  If problems occur look at the online help in the
area of difficulites.
  1) Select the correct Personality Card (PsC) for the vendor and device
     which is to be read or programmed.
  2) Open the LogicLab 2000 by turning the thumb screw on the bottom and
     install the PsC noting that the words up are visable. Close the unit.
  3) Plug the DB-25 connector into either serial port 1 or 2 of the host.
  4) Plug the wall adapter into the wall outlet and into the DB-25.
  5) Plug the RJ12 (phone cord) into the DB-25.
  6) Select the directory with the LogicLab 2000 files (ALL OF THEM).
  7) Type LL if conected to serial port 1 (com 1).
  8) Type LL 2 if connected to serial port 2 (com 2).
  9) Plaec the desired GAL device into the 28 Pin ZIF with pin 1
     located at the opposite corner from the ZIF handle.
 10) Have fun! (remember that help is available at F1)
@@SELECT
       The LogicLab 2000  supports  the  devices  of  several semiconductor 
manufacturers.  When the user  chooses  "SELECT" from  the main menu, a new 
menu is presented which allows the user  to select the  device manufacture.
Upon  making  this  selection  the  user is presented with the menu of this
manufacturers devices which the LogicLab 2000 currently supports.  The user
then selects  the  target  device  which they wish to program.  Some of the 
devices  supported  by  the LogicLab 2000 may be configured to emmualte PAL
devices.  The  selection of a RAL provides for this emmulation and presents
a new menu with a subset of the devices emmulated by  this RAL.Selecting  a
subset of one of these causes two things two happen. First the architecture
is forced  to mimic the  subset, second fuse numbers are  translated during
JEDEC uploads and downloads.  Assume you have selected the 16V8 subset 10L8
All output logic macro cells will be pre-configured  to be combinatorial, a
JEDEC  download will only work correctly with a file created  for a 10L8, a
JEDEC upload will produce a file for a 10L8, and the target device will
function exactly ( pin for pin )like a 10L8 when programmed.
@@CLEAR
 *     CAUTION: SAVE FILE BEFORE CLEARING THE BUFFER      *
  
     The buffer is the memory area where programming information is stored.
This information  may enter  the buffer from one of three sources. The user
may down  load a  JEDEC file  which is  translated into  the fuse map to be
stored in the buffer. As a second method the user may wish to manually edit
the contents  of the  buffer to  produce a new programming pattern. Finally
the buffer  may be  loaded by  reading the  target GAL  device in  the  ZIF
socket. Independent of  how the  user has  filled the  buffer when "Clear"
is  selected this  information is  lost for  ever. The  user  is  cautioned
to  save buffer  data (using  "Upload") prior to selecting "Clear".
@@UPLOAD
     The user  may permanently  save the  contents of the buffer on disk by
using the  "Upload" command.    When  executed,  this  command  writes  the
contents of  the buffer  to the  default memory device using the JEDEC data
format.   The user  is prompted to provide a file name under which the file
is to  be stored. If the specified name already exists the user is asked if
they choose to overwrite the file or not.  When the choice to overwrite the
file is made the contents of the old file are destroyed and the new file is
written in  its place.   If  the user chooses not to overwrite the file the
upload is aborted and control is returned to the main menu. The contents of
the buffer  may be  a programming  pattern which  has been  read from a GAL
device in  the ZIF socket, a pattern which has been downloaded from a JEDEC
file, or the contents of the buffer after manually editing it.
      Note  that unless  specified, all  files are  stored  with  the  .JED
extension.   It is  assumed that  the file  is to  be stored on the default
drive. If you wish to store the file on another device the device name must
be specified. For example: If "LL.EXE" is executing from C: and COUNTER.JED
is to  be saved  to a file on Drive A: issue the following:  A:COUNTER.JED.
@@DOWNLOAD
    The contents  of a  JEDEC file  which is on disk may be down loaded to
the buffer  storage area  of the  Logic  Lab.  When  selected,  the  option
requests the  name of  the file  which is to be down loaded.  Note that the
file extension  is assumed  to be  .JED.   If your  JEDEC file  has another
extension it must be specified. The successful download is acknowledged and
the user may strike any key to return to the main menu.
     Although down loading of a file is assumed to proceed from the default
disk, a drive may be specified.  For example: If the host code "LL.EXE"
is executing  from drive  C: and the A: has a floppy with COUNTER.JED
(the desired  JEDEC file)  specify A:COUNTER.JED to download the file.
@@BUFFER
     The contents  of the  Buffer may  be displayed and edited by selecting
this option.   When  selected the  buffer option will present the user with
one of  two sub  menus. The  choice of the sub-menu is based upon which GAL
device has  been selected.  One of the sub-menus is for the GAL39V18 device
and the  second sub-menu  is for  the remaining  GAL devices.  For  further
information of  displaying and  editing the buffer select the buffer option
and request help.
@@LOAD
     A pattern which has been programmed into a GAL device may be read from
the device and stored in the buffer for inspection, editing or uploading to
a storage  device.  To correctly accomplish this task the user must specify
the GAL device type (16V8 ect.).
@@VERIFY
     The verify option is selected to compare the contents of the buffer to
the pattern  which has  been programmed  into a  part.   If the data in the
buffer is  exactly the  same as  the pattern  in the part a message stating
"data in  buffer matches  device" is returned. In the event that the buffer
and the  part contain  different data  a message  stating "device  does not
match buffer" is returned.  The cycle counter (number of times the part has
been programmed) is also displayed.
@@PROGRAM
     The GAL device may be programmed to contain the contents of the buffer
by making  this selection.   When  the programming  has been  completed the
message "Programming  done" and  the cycle  counter status (number of times
the part  has been  programmed) are displayed.  The user may hit any key to
return to the main menu.
@@MASTER
     The GAL  device may  be designated  as a  Master device at the time of
programming.   When this  is done the contents of the buffer are programmed
in to  the GAL  device and  the Master bit is set. After the Master bit has
been set  subsequent attempts  to program  the  part  will  result  in  the
following  messages:
      "You are about to program a Master device are you
       sure you want to do this?"
  
      "Enter Y to continue"
If the user depresses <enter> the programming cycle is aborted. Entering Y
<enter> will cause the part to be overwritten.
@@SECURITY
     The pattern  which has  been programmed  into the  GAL device  is made
unreadable by  setting the security flag.  Once this flag has been set in a
device it  may not  be cleared except by reprogramming the part and thereby
erasing the  secure data.
     The user  selects "Security"  from the main menu to invoke setting the
security on  the  part  being  programmed  and  all  parts  which  will  be
programmed until  the security  feature has  been reset.    When  the  user
selects security the following message appears on the screen:

      "Do you want to automatically secure the parts
       after programming?"  "Enter Y or N."
 
Selecting Y<enter> causes all future parts to be secured until the security
flag is  reset by selecting "Secure" again.  Selecting N <enter> will abort
the securing process.
     It should be noted that the security flag selection is not stored with
the JEDEC  file and  any attempt  to download a file and program parts will
result in  parts which  are not  secure. 
@@MAIN
     The contents  of the  main array  is displayed  when this  function is
selected. The data is displayed as an array of 'X'and '-'characters arranged
represent the product ( AND ) terms for each output. An 'X' represents the
inclusion  of an  input in the product term while the '-' represents the
opposite.   The pattern  representing the main array may be edited manually
by the user. To edit the main array select 'E' from the following prompt:

      Enter ESC to end display, E to edit display, CR to view next 8 rows

   Change the  input   term  to either  an 'X'  or a  '-' by  entering  the
appropriate character  from the  keyboard. Use the left and right arrows to
position the  cursor over  the input    term to  be changed.   When through
editing depress  the <ESC> key to display the rest of the product terms or
depress the <ENTER> key to edit the next product term. Select '.' when the
above prompt reappears to return to the EDIT BUFFER menu.
@@UES
 The user  may enter  an electronic  signature for part identification.
This 8 character signature consists of character data between 0-9, A-Z, and
a-z. The  user may  enter the  characters of  this signature  in hex format
at the following prompt:

Electronic Signature in HEX. Enter 0-9 & A-F
Press enter to finish
00 00 00 00 00 00 00 00

 The electronic signature is then displayed in character format.
Electronic Signature as characters. Enter 0-9, A-Z, a-z 
Press enter to finish
a a a a a a a a	

Pressing enter stores the electronic signature and returns to the EDIT menu.
@@ARCH
  Selecting this function will allow the user to edit the architecture fuses
in the 16V8/16Z8/20V8 buffer.  These fuses are grouped according to function
and  displayed one row at a time.   A row  may be edited using  <,>,X and -.

       PIN              22 21 20 19 18 17 16
       POLARITY FUSES    X  X  X  -  X  X  X
The - fuse above represents the state of the POLARITY fuse for pin 19.

Each output pin has associated with it several architecture fuses. These are

1) Polarity fuse to control output polarity.
2) AC1 fuse which is used to control the output configuration.
3) Eight Product term disable fuses.

  In addition there are the SYN fuse and the AC0 fuse.  These affect all the
outputs.   The combination of SYN , AC0 and AC1n (n = pin number) determines
wether the output is SYNCHRONUS or COMBINATORIAL, how the output is fed back
to the array and whether to use a product term for output enable or not. The
product  term disable fuses are used to disable unused product  terms in the
16V8/20V8  when emulating a device with less than 8 product terms per output
( i.e. a 10L8 ).
@@AND
     The contents of the main and array is displayed when this  function is
selected.   The data  is displayed  as an  array of  'X' and '-' characters
arranged to represent the product (AND) terms in the 6001. An 'X' represents
the inclusion  of an input in the product term while the '-' represents the
opposite. The output of each of the product terms is avaliable to all of the
sum ( OR ) terms in the OR array. The pattern representing the main and 
array may be edited manually by the user. To edit the main and array select
'E' from the following prompt:

      Enter ESC to end display, E to edit display, CR to view next 8 rows

   Change the  input   term  to either  an 'X'  or a  '-' by  entering  the
appropriate character  from the  keyboard. Use the left and right arrows to
position the  cursor over  the input    term to  be changed.   When through
editing depress  the <ESC> key to display the rest of the product terms or
depress the <ENTER> key to edit the next product term. Select '.' when the
above prompt reappears to return to the EDIT BUFFER menu.
@@RESET
     The reset product ( AND ) term is displayed when this function is
selected.   The data  is displayed  as a line  of  'X' and '-' characters
arranged to  represent the 6001 reset product term.  An 'X' represents
the connection  of an input to the AND term while the '-' represents the
opposite. The pattern representing the reset product term may be edited
manually by the user. Change the  input   term  to either  an 'X' or a '-'
by  entering  the appropriate character  from the  keyboard. Use the left
and right arrows to position the  cursor over  the input term to be changed.
When through press <ENTER> to return to the EDIT BUFFER menu.
@@OE
     The contents of the main and array is displayed when this  function is
selected.   The data  is displayed  as an  array of  'X' and '-' characters
arranged to  represent the product terms which control the output buffers of
each output. An 'X' represents the inclusion of an input in the product term
while the '-' represents the opposite. The pattern representing the output
enable and array may be edited manually by the user. To edit the output
enable array select 'E' from the following prompt:

      Press E to edit output enable product terms

   Change the  input   term  to either  an 'X'  or a  '-' by  entering  the
appropriate character  from the  keyboard. Use the left and right arrows to
position the  cursor over  the input    term to  be changed.   When through
editing depress  the <ESC> key to display the rest of the product terms or
depress the <ENTER> key to edit the next product term. Press <ENTER> when the
above prompt reapears to return to the EDIT BUFFER menu.
@@OR
     The contents of the OR array is displayed when this  function is
selected.   The data  is displayed  as an  array of  'X' and '-' characters
arranged to represent the sum ( OR )  terms in the 6001. An 'X' represents
the inclusion of an output of a product term in the sum term while the '-' 
represents the opposite. The output of each of the product terms is avaliable
to all of the sum ( OR ) terms in the OR array. The pattern representing the
OR array may be edited manually by the user. To edit the OR array select
'E' from any of the following prompts:

  Enter ESC to end display, E to edit display, CR to view OLMC SUM term rows
  Enter ESC to end display, E to edit display, CR to view SLMC SUM term rows
  Enter E to edit display, CR to return to edit menu

   Change the  input   term  to either  an 'X'  or a  '-' by  entering  the
appropriate character  from the  keyboard. Use the left and right arrows to
position the  cursor over  the input    term to  be changed.   When through
editing depress  the <ESC> key to display the rest of the sum terms or
depress the <ENTER> key to edit the next sum term.
@@ARCH18
  Selecting this function will allow the user to edit the architecture fuses
in the 6001  buffer.  These fuses are grouped  according  to function  and
displayed one row at a time.   A row  may be edited using  <,>,X and -.
        OLMC OUTPUT PIN  14 15 16 17 18 19 20 21 22 23
        OLMC clock fuses  X  X  X  -  X  X  X  X  X  X
The - fuse above represents the state of the clock fuse for pin 17.
 The architecture of the 6001 has 18 "outputs". Eight of these are "buried"
and can be used for internal states. Each of the outputs has associated with
it a MACRO CELL. The Buried outputs have State Logic Macro Cells (SLMC) and
the other outputs have Output Logic Macro Cells (OLMC). These cells provide
the following.
 1) Clock fuse  (OLMC or SLMC) output clocked from array or pin 13
 2) Outsyn fuse (OLMC or SLMC) output registered or combinatorial
 3) XORE fuse   (OLMC or SLMC)	'E' sum term polarity control
 4) XORD fuse   (OLMC only)    'D' sum term polarity control

 In addition there are Input Logic Macro Cells and I/O Logic Macro Cells.
These provide the following.
 1) Syn fuse   ( ILMC or IOLMC ) input is synchronus or not
 2) Latch fuse ( ILMC or IOLMC ) input is latched or not
@@CKS
  The fuse checksum is calculated by treating groups of 8 fuses as bytes and
adding them to form an unsigned 16 bit sum. Each byte is formed by using the
lowest number fuse for the least significant bit and so on. For example  the
first byte would have fuse 0 as its LSB and fuse 7 as its MSB.   The current
value of the  checksum is displayed  whenever a device is loaded , a file is
downloaded  or upon  exit from the edit menu.  Selecting Checksum will force
recalculation and display of the checksum.
@@16V8
    Select a 16V8 as the target device. The programmer will be checked for a 
16V8 prior  to LOAD, VERIFY or PROGRAM operations.  Download operations will
work correctly only with a file assembled for a 16V8. Upload operations will
produce a JEDEC file for a 16V8.
@@16Z8
    Select a 16Z8 as the target device. The programmer will be checked for a 
16Z8 prior  to LOAD, VERIFY or PROGRAM operations.  Download operations will
work correctly only with a file assembled for a 16V8. Upload operations will
produce a JEDEC file for a 16Z8.
@@20V8
    Select a 20V8 as the target device. The programmer will be checked for a 
20V8 prior  to LOAD, VERIFY or PROGRAM operations.  Download operations will
work correctly only with a file assembled for a 20V8. Upload operations will
produce a JEDEC file for a 20V8.
@@39V18
    Select a 39V18 as the target device. The programmer will be checked  for 
a 39V18 prior to LOAD, VERIFY or PROGRAM operations. Download operations will
work correctly only with a file assembled for a 39V18. Upload operations will
produce a JEDEC file for a 39V18.
@@16V8RAL
    A sub-menu will appear to allow selection of the desired subset of the 
16V8. Selection of a subset of the 16V8 will result in the following. The
programmer will be checked for a 16V8 or a RAL which matches the subset you
have chosen prior to LOAD, VERIFY or PROGRAM operations. Download operations
will work correctly only with a file assembled for the subset. Upload
operations will produce a JEDEC file for the subset.
@@16Z8RAL
    A sub-menu will appear to allow selection of the desired subset of the 
16Z8. Selection of a subset of the 16Z8 will result in the following. The
programmer will be checked for a 16Z8 prior to LOAD, VERIFY or PROGRAM
operations. Download operations will work correctly only with a file
assembled for the subset. Upload operations will produce a JEDEC file
for the subset.
@@20V8RAL
    A sub-menu will appear to allow selection of the desired subset of the 
20V8. Selection of a subset of the 20V8 will result in the following. The
programmer will be checked for a 20V8 or a RAL which matches the subset you
have chosen prior to LOAD, VERIFY or PROGRAM operations. Download operations
will work correctly only with a file assembled for the subset. Upload
operations will produce a JEDEC file for the subset.
@@TEST
    A sub-menu will appear to allow selection of one of several tests to
be executed. These tests have been developed in cooperation with Lattice
Semiconductor Co and are intended for use only by manufacturers of GAL
devices.
@@EDIT16
    This executes a test routine which performs the following steps in
an endless loop.

      1) enter 16V8/20V8/16Z8 edit mode.

      2) read MES ( Vie = 12 volts ) and determine value for Vie and Tpwp.

      3) perform a bulk erase cycle.

      4) write MES back to part.

     This loop will work for 16V8, 20V8 and 16Z8. Press any key and
the loop will stop after completing step 4.    
@@EDIT39
    This executes a test routine which performs the following steps in
an endless loop.

      1) enter edit mode.

      2) exit edit mode.

    This loop will work for 16V8,20V8,16Z8 or 39V18. Simply select the 
desired device and the edit mode will be entered and exited accordingly.

Press any key and the loop will stop after completing step 2.
@@WRITE
    This executes a test routine which performs the following steps in
an endless loop.

      1) enter 16V8/20V8/16Z8 edit mode.

      2) read MES ( Vie = 12 Volts ) and determine value for Vie and Tpwp.

      3) perform as bulk erase cycle.

      4) write MES back to part.

      5) write rows 0 .. 31 with a 0101.... pattern.


    This loop will work for 16V8, 20V8 and 16Z8. Press any key and
the loop will stop after completing step 5.
@@SERIAL
    The serial number of the Logic Lab being used is read and displayed.

@@IGNORE
    Causes the MES ( Manufacturers Electronic Sigunature ) to be read but
ignored. This option will allow a device with an invalid MES to be read 
or programmed. When used in conjuction with the Change MES option a MES can
be entered into a device.

@@CHANGE
   Allows the MES ( Manufacturers Electronic Sigunature ) to be edited.
If this option has been selected, the programming cycle will pause, the
current value of the MES will be displayed ( in HEX ) and the user may
alter the MES. Cursor keys may be used to position the cursor on the HEX
digit(s) to be changed. ENTER enters the changes and the programming cycle 
will continue using the new MES. NOTE no checking is done for valid HEX
entry.
@@FAST
    Set/Reset a flag which when set will force the read/write/verify routine
to set the architecture row per the specification for the 10 ns GALS
@@LCGENERAL
    The LC-9000 Logic Compiler produces JEDEC  standard  output  files  from
Boolean equation input.  The LC-9000 allows the  user to produce a .PLD file
using the residenteditor, compile this source  file  and  minimize  the .PLD
equations, produce the JEDEC file, produce documentation  files, and do file
management.  The source  file  format  used by the LC-9000 is unique to this
program and files developed for  other  logic  compilers  will  probably not
compile. Specific information on the source file format, and features of the
LC-9000 is  available  from this  HELP MENU by escaping back to the previous
level and selecting the desired topic.

To use the LC-9000 Logic Compiler  select  LC-9000 from the first screen and
the following screen will appear:

     +------LOGIC COMPILER Rev:# by PROGRAMMABLE LOGIC---------+
     | NEW SOURCE     JEDEC     LIST     DIR     ChDIR     EDIT|
     +---------------------------------------------------------+
To select a command from the menu, use the left/right arrowkeys to move the
highlighted block to the desired function and press [enter].
@@LCSOURCE
   The  LC-9000  Logic  Compiler requires the specific file format which is  
presented here.  Source  files which have been prepared for other compilers 
or assemblers, including  FastMaptm,  are not compatible with this compiler 
and must be rewritten in this format  to run on the LC-9000 Logic  Compiler 
successfully.

The source file (or .PLD file) must have the following
format:

DEVICE  (device name);

             This is the name of the target device for which the file is to 
             be prepared.  The name is  required.  It must be selected from 
             the list in Appendix B and  entered just as it is shown in the  
             list.  Note that a semi-colon follows the device name.

TITLE  (file title);

             The TITLE keyword is optional and is provided for ease of 
             documenting the design. When this field is completed the string
             following TITLE  will be printed on the top of each page of the
             document file. This field is limited to 80 characters; anything
             beyond 80 characters will be truncated.


NAME  (file name);

             The  NAME  keyword  is  optional  and  is  provided for ease of 
             documenting the design.  It  is  treated  just  like  the TITLE 
             keyword.


SIGNATURE (electronic signature);
               
             The  SIGNATURE  field is optional. If this field is present the 
             data will be transferred to the JEDEC file if the target device
             supports  signature  data.  The  field  may  contain  up  to 80 
             characters.  The number of  characters  placed  in  the  actual 
             signature will  depend  on the target device.  For example, the 
             GAL6001 has room for a 9 character signature.
               
PIN (first pin #)  =  (name);

            .
            .
            .

PIN (last pin #)  = (name);
              
             The PIN statement  assigns  a  name  to  each pin of the target 
             device. Every pin of the target  device  which is to be used in 
             an equation must be defined in a  pin statement.  No definition 
             is required for any pins  which  are  not to be used.  The name 
             must be unique to each pin and must be spelled exactly the same
             when referenced in an  equation.  The name may be 16 characters 
             long, including any alphanumeric  characters or an underscore _.
             Please note that  a  name  may  not  contain embedded spaces as 
             these are used  as  delimiters by the parser. Use an underscore 
             to separate parts of the name. Also note that no distinction is
             made between upper and  lower case characters so that the names
             FARG and Farg are identical as far as the compiler is concerned.
NODE (first node #)  =  (node name);

             .
             .
             .

NODE (last node #)  =  (node name);

             The  NODE  statement  is  used  to  define  a name for internal 
             features of a part which may then be manipulated as though they
             were pins.  The same rules  apply  to  the NODE statement as to 
             PIN assignments. A node might  refer  to  a product term, a sum 
             term or a single fuse.  Nodes are unique to each device and are
             detailed for each part in Appendix A.
               
<symbol> = <expression>;
         .
         .
<symbol> = <expression>;

             EQUATIONS assign an  expression to a symbol. A symbol is a NODE 
             or PIN name, or a name with a modifier. A modifier references a
             function associated with a name. For example name.OE references
             an Output Enable function  associated  with t he pin 'name', or 
             name.D references the D input to a register associated with the
             pin 'name'.
               
             An expression is a group  of  symbols  separated  by operators.
               
             Parentheses may be used to  simplify reading an expression, and
             operators  may be applied to  create  complex  expressions. For 
             example:
               
             name = (expression1) & (expression2);
              
             logically 'ands' expressions 1 and 2 to create a new expression
             which is assigned to  'name'.
               

 /*  comments...................*/

             To help make the file more readable by others  and permanently 
             document  it,  comments may (and should) be liberally inserted 
             into the source file.   Comments  have  the effect of becoming 
             living documentation and  should  be  maintained  just  as the
             equations are.  A  comment may be inserted at any point in the
             file by preceding it with  back-slash asterisk (/*) and ending
             with asterisk back-slash (*/).
               
             Comments  may  be  on  lines  which  include  equations,   pin 
             declarations or any other place the designer deems appropriate.
@@LCSYNTAX

LOGICAL OPERATORS

Three logical operators are available to prepare equations.
These operators are ( in order of precedence ):
          
     Function       Symbol         Example
   
     NOT            !                   !A;
     AND            &                   A & B;
     OR             |                   A | B;


ORDER OF EVALUATION
In evaluating and  reducing  an  expression,  !  (not)  is  evaluated first,
&  (and) next, and | (or) last.

Parentheses  may  be  used  to change the order of evaluation.  For example 
!(A & B) is equivalent to !A | !B, since the & is evaluated prior  to the !.

PIN NAMES
Only the pins which are to be  used  must  be  given  names.  The  power and 
ground pins serve a special purpose.  They are used in expressions which are
always true or always false.

For example name.OE = VCC  (where VCC is the name assigned to the power pin 
for the device) will cause  the  OE  term  for pinname to be true under all 
conditions.

Each pin to be named must include the keyword PIN followed by the number of
the pin and an equal  sign.  For  example:  PIN 1 = AX10;.  The actual name 
assigned to the pin must begin with an alphabetic character and may include 
up to 16 alpha or numeric  characters; the underscore character is the only 
special character which may be included in the pin name.

PIN MODIFIERS
Pin modifiers are used to define the state of the function  associated with 
a pin.  Pin names may not include the reserved words listed below.  The pin 
modifiers supported include:
     
     .OE  Output Enable term associated with a pin
     .D   D input to a register associated with a pin
     .E   E
     .T   T
     .J   J
     .K   K
     .S   S
     .R   R
     .Q   Q output of a register associated with a pin
     .CK  CK input to a register associated with a pin
     
As  an  example, the .OE pin modifier enables the output for the associated 
pin when the  expression  is  evaluated  as  true.  Consider the expression 
name.OE = NUM.  When NUM is equal to 1  (true), the   output pin is enabled. 
When NUM is equal to 0 (false), the output pin is disabled.

If NUM were a name assigned to the  power  pin  for  the device, the output 
would always be enabled. If NUM were  assigned  to  the  ground  pin of the 
device the output would never be enabled.

A given pin modifier may or may not be valid depending on the target device.
Refer to Appendix A: Special PLD Architectures for the specific application
of pin modifiers for the part being used.


RESERVED WORDS

The following words are reserved for use by the compiler and  should not be 
used when preparing the variable names:

   PIN, NODE, BURIED, TITLE, DEVICE, SIGNATURE.
@@LCNEWSOURCE
     The  compiler  will  request  the  name of the input source file to be 
compiled.  The file extension .PLD is assumed, however any extension may be 
used. A file with the name specified must exist on the specified path.After
the source file name is entered, press [enter].  The  compiler will compile 
the source file.
@@LCJEDEC
    The JEDEC file can only be produced from a file which has been compiled
by  the LC-9000  Logic  Compiler. This command will normally follow the NEW 
SOURCE command. When JEDEC is highlighted and selected by pressing [enter],
the user is prompted to enter  the name of the output file. The output file 
will have an extension of.JED  unless another valid extension is specified.

Following entry of the output file name,the compiler will produce the JEDEC
file and save it on the default drive. Control, indicated by the highlight,
is then returned to the command line.
@@LCLIST
    When highlighted and selected, the LIST command produces an ASCII file
documenting the design. It should be noted that the LIST command cannot be 
selected until a file has been compiled using the NEW SOURCE command.
            
The LIST command will produce an ASCII file of a compiled source file.This
document  file includes the title of the design and an outline of the part 
showing  the  pin  assignments.  The buried pins are listed with their pin 
assignments, and an equation list is  included for the compiled equations.
The compiler prompts the user for the name  of an output file; the default 
is  the source file name with an extension of .DOC. When the document file 
has  been written to the default disk, the message "Document file Written" 
is displayed.
@@LCDIR
    This very useful function allows the user to obtain a directory of the 
current disk.  When highlighted and selected the function prompts the user 
to "Enter file type".  Enter the file extension for which a directory is 
requested (.pld or .jed for example) and press [enter].
        
If no extension is specified, a complete directory of the disk will be 
displayed.
@@LCEDIT
     The edit  utility  allows modification of a file without leaving  the    
compiler.  This  allows the designer to create a pld file and  compile  it 
without leaving the LC-9000 environment.  It is intended  that  the editor 
remain a simple feature that can be used easily without undue effort.
            
A  header  at  the top of the screen defines the use of the  function keys 
which are used  as  command  keys  by  the  editor.   Since there are more 
commands than keys the editor uses the shift key  in  conjunction with the 
function key.  When the shift key is pressed  the  key  description in the 
header is changed to show the meaning of the shift\function key. Table 2-1 
below lists all of the editor key functions.            
 +----------------------------------------------------------+
 |       Function      Operation                            |
 |                                                          |
 |       F1            Move cursor one word left            |
 |       F2            Move cursor one word right           |
 |       F3            Page to top of screen                |
 |       F4            Page to bottom of screen             |
 |       F5            Scroll up one line                   |
 |       F6            Scroll down one line                 |
 |       F7            Find a (prompted) string             |
 |       F8            Directory                            |
 |       F9            Load a File                          |
 |       F10           Save a File                          |
 |                                                          |
 |       SHIFT-F1      Mark a position in a file            |
 |       SHIFT-F2      Delete previously marked text        |
 |       SHIFT-F3      Copy previously marked text          |
 |       SHIFT-F4      Paste previously marked text         |
 |       SHIFT-F5      Delete current line                  |
 |       SHIFT-F6      Set the line tab                     |
 |       SHIFT-F8      Change Directories                   |
 +----------------------------------------------------------+
                           Table 2-1
