hilosystems HI-LO ALL-07 parallel port universal device programmer resources page

PAC-DIP40 V3 (the QC tag says 0496) The PAC-DIP40 module that I have seems to be a version 3, mostly the same but a few changes compared to the previous ones.

<Click on image to enlarge>

<Click on image to enlarge>

http://raven1.magix.net/all_07/all_07.html Programator uniwersalny Hi-Lo Systems model ALL-07 - mirror of Hilo ALL-07 page with all stuff (info, schematics, software) translated into polish

Hilo All-07 full software archive (ZIP- 16.63Mb)

https://picclick.de/Hilo-ALL-07-universal-programmer-mit-Zubeh%C3%B6r-232131639208.html

Hilo All07 software revisions (PDF - 139Kb)

Hilo All07C V.9.22 software Release issue date : 09 Nov. 1999

Hilo All07C V9.22 disk images

Hilo All-07 User's Manual (PDF - 46 pages - 2.33Mb)

HILO All-07 V9.23 Devices list (PDF- 36 pages - 54Kb)

https://elmicro.com/files/hilo/all07a

Commercial brochure Hilo All-07 (djvu - 135 Kb)

Commercial brochure Hilo All-07 (PDF - 1.08Mb)

Hilosystems Catalog '94/95 (PDF - 10 pages - 6.61Mb)

ftp://ftp.hilosystems.com.tw/pub/download/pac-dip40/DIP40.HTM

http://web.archive.org/web/20040209212229/https://www.tribalmicro.com/updates/flex-700tup-500/

http://www.hilosystems.de/ (Germany) Hilosystems Europe

http://www.hilosystems.de/php/swall0x.php Software-Support ALL-0x-Serie (password required)

from Tinhead' (Germany) GAL jed and equation files for HiLo ALL07(A)

Reversing was so far not that complex, the U6 clock PAL is very similar to what U5 on EXPRO-60 is doing, the U3 from All07 is doing exact the same as U35 from EXPRO-60 is doing.

Only U2 was "hard" thing, in ALL07 HiLo changed how the CODEID is being checked. To make it more "copy protected" they changed the CODEID high byte coding from shift register to registered memory. But a good DOS disassembler and logic analyzer was finally the way to go. An PAL analyzer (Pal Device Reader from cgfm2.emuviews.com) was here not enough due the "registered mode memory" implementation.

here (Archive ZIP - 7 Kb)

TITLE:  U2 ALL07A
	Revision: PCB_REV_D
	Author:   tinhead@eevblog
	Date:     Feb 25 14

CHIP DEC_HIGH gal16v8

clk  nc  a5  a6  a7  read  in_oe1  2e0  ps  GND
!in_oe2  dir_U12  out_oe1  d7  d6  d5  d4  dir_U11  adr_lock  VCC

EQUATIONS

  !dir_U11 = a7 & a6 & a5 & !read

  !dir_U12 = !a7 & !a6 & !a5 & !read

  adr_lock = !2e0

  out_oe1 =  in_oe1

  d7:= ps &  d4 &  d5 & !d6 & !d7
    #  ps &  d4 & !d5 &  d6 &  d7
    #  ps &  d4 &  d5 &  d6
    #  ps & !d4 &  d5 &  d7
    #  ps & !d5 & !d6 &  d7
    # !ps &  a7

  d7.oe = in_oe2
  
  d6:= ps &  d4 &  d5 &  d6 & !d7
    #  ps &  d4 &  d5 & !d6 &  d7
    #  ps &  d5 &  d6 &  d7
    #  ps &  d4 & !d5 &  d6  
    #  ps & !d4 &  d6 & !d7
    # !ps &  a7

  d6.oe = in_oe2    
  
  d5:= ps &  d4 & !d5 & !d6 &  d7
    #  ps & !d4 &  d5 &  d6 & !d7
    #  ps & !d4 &  d5 & !d6
    #  ps &  d4 & !d5 & !d7
    #  ps &  d4 &  d5 &  d6
    # !ps &  a7

  d5.oe = in_oe2  
  
  d4:= ps & !d4 &  d5 &  d6 & d7
    #  ps & !d4 & !d5 & !d6 & d7
    #  ps & !d4 & !d5 & !d7
    #  ps & !d4 &  d5 & !d6
    #  ps &  d5 &  d6 & !d7
    # !ps &  a7  

  d4.oe = in_oe2
  
  
; design comments
;
; table for CODEID & xF0 check
;
;                  1          2         3  
;         1234567890123456 7890123456789012
;         ---------------- ----------------
;         0100101010101011 0100101010101011
;         1000011001100111 1000011001100111
;         1110000000011111 1110000000011111
;         1110000111100001 1110000111100001
;         ---------------- ----------------
;ALL07A - xxCxxxxxxxBxxxxx xxxxx23xxxxxxx7x
;code   - EDC012389AB4567F EDC012389AB4567F
;
; pin 11 and pin 13 connected together
;

TITLE:  U3 ALL07A
	Revision: PCB_REV_D
	Author:   tinhead@eevblog
	Date:     Feb 25 14

CHIP DEC_LOW gal16v8

clk  ps  a3  a4  a5  a6  a7  read  reset  GND
!oe  out_oe  cs2_u24  d3  d2  d1  d0  cs2_u25  cs2_u26_36  VCC

EQUATIONS

  !cs2_u24 =  a7 & a6 & a5 & a4 & !a3 & reset
  cs2_u24.oe = vcc

  !cs2_u25 = a7 & a6 & a5 & !a4 & a3 & reset
  cs2_u25.oe = vcc

  !cs2_u26_36 = a7 & a6 & a5 & !a4 & !a3 & reset
  cs2_u26_36.oe = vcc

  !out_oe = a7 & a6 & a5 & a4 & a3 & !read & reset
  out_oe.oe = vcc

  d3 := ps & d2 
     # !ps & a6
  d3.oe = oe

  d2 := ps & d1 
     # !ps & a6
  d2.oe = oe

  d1 := ps & d0 
     # !ps & a6
  d1.oe = oe

  d0 := ps & !d1 &  d2 &  d3 
     #  ps & !d0 &  d2 &  d3
     #  ps &  d0 &  d1 & !d3
     #  ps & !d2 & !d3
     # !ps &  a6
  d0.oe = oe

; design comments
;
; table for CODEID & x0F check
;
;                  1          2         3  
;         1234567890123456 7890123456789012
;         ---------------- ----------------
;         0110010100001111 0110010100001111
;         1011001010000111 1011001010000111
;         1101100101000011 1101100101000011
;         1110110010100001 1110110010100001
;         ---------------- ----------------
;ALL07A - xxBxxxxxxx8xxxxx xxxxx92xxxxxxx7x
;code   - EDB6C925A480137F EDB6C925A480137F
;
; pin 11 and pin 12 connected together
;
;


****

TITLE:  U6 ALL07A
	Revision: PCB_REV_B
	Author:   tinhead@eevblog
	Date:     Feb 25 14

CHIP CLK_GEN gal16v8

clk1  i2  i3  i4  feed_in  clk2  nc  nc  f5_d0  GND
nc  pin19  pin18  nc  feed_out  nc  le_ttl  pin3  pin2  VCC

EQUATIONS

  pin2 =   feed_out & !i2 & i4
        #  clk2 & i2 & i4
        # !i2 & !i3 & !i4
  pin2.oe = vcc

  pin3 =  !feed_out & !i2 & i4
        # !clk2 & i2 & i4
        # !i2 & !i3 & !i4
  pin3.oe = vcc
         
  pin18 = !feed_out & !i2 & i3
        # !clk2 & i2 & i3
        # !i2 & !i3 & !i4
  pin18.oe = vcc
  
  pin19 =  feed_out & !i2 & i3
        #  clk2 & i2 & i3
        # !i2 & !i3 & !i4
  pin19.oe = vcc
  
  le_ttl =  !f5_d0
  le_ttl.oe = vcc

  feed_out :=  !feed_out


; design comments
;
; truth table, f is clk freq
;
; i2......0......1......0......1......0......1......0......1
; i3......0......0......1......1......0......0......1......1 
; i4......0......0......0......0......1......1......1......1
;
; Pin2....0......0......0......0....f/2......f....f/2......f
; Pin3....0......0......0......0...!f/2.....!f...!f/2.....!f
; Pin18...0......0...!f/2.....!f......0......0...!f/2.....!f
; Pin19...0......0....f/2......f......0......0....f/2......f
;

Hilo ALL-07 schematics : there are 3 cards : upper, middle and lower . upper card is the one with the ZIF connector. for information green rectangles concern an other side of the diagram in order to have functional information without losing where the signals goes from or where they come.

Update (schematics corrected 05/05/2019)

schematic_all-07_Upper (PDF- 4 pages - 922Kb)

schematic_all-07_Middle (PDF-17 pages - 3.17Mb)

schematic_all-07_Lower (PDF - 9 pages - 1.21Mb)

a way to read secured pals by building an adapter (details in Italian) folder with gerber files : here is the zip of the whole project's folder. The schematic and PCB has been made with KiCad. In the \Gerber subfolder you'll find all the needed file to send to the service of choice. Don't send the .gvp file, it's a GerbV project file (GerbV is another Gerber free viewer that you can find on the internet).

Sorry, all the files are in Italian, but due to the simplicity I think that you will not have any problem to understand it.

PAL adapter schematics (PDF - 24Kb)

sequence of operation for duplicating 20-pin protected PAL (Pdf- 4 pages - 185Kb)

http://dreamjam.co.uk/emuviews/readpal.php

POD-DIAG40

http://www.tribalmicro.com/updates/flex-700tup-500/construction.html

in the diag help is something of

Point 1 : JP1 - GND + 8V - 0.1V
Point 2 : JP2 - GND + 12V - 0.1V
Point 3 : JP3 - GND + 21V - 0.1V

The programmer will also need to have 5V .

There are
Step 1 : TTL I / O test
Step 2 : 0.1u CAP test pins
Step 3 : VCP test pins
Step 4 : TBR test pins
Step 5 : Test pins VHHenc
Step 6 : VOP test pins
Step 7 : VOPX pins test
Step 8 : OSC test pins
Step 9 : TTL I / O test

Thus , VCP will be 5V , 14V VHH ( ? ) , VOP 12V , VOPX21V

There are different versions of hilo all-07 : the one that is plugged on the parallel port and that must have so an external power supply : this version needs a simple SUB-DB25 SUB-DB25 straight 1-1 (...) 25-25 cable
and there is another version that uses also a straight sub-25 cable but that must not be plugged not on the parallel port , but on a SAC-07 isa card : this version doesn't need an external power supply for the programmer
(in the software the programmer is recognised as "PC-BASED"
See ISA.pdf to have the diagram of this card; hereafter a photo of this card ;

the schematic of the SAC-07 ISA Card for PC-BASED Hilo ALL-07 (PDF - 1 page - 26 Kb)

a schematic of this card is available here

interface of the ALL07 (PDF - 2 pages - 33Kb)

https://www.ebay.fr/itm/311602389002 power supply 5Volts/2A and 12Volts/2A may be used to power the ALL-07

Note : a problem has occured while powering the All-07 with a 5V/2A&12V/2A power supply that had no Earth on the Main plug when connecting the All-07 to the PC (pc which has the Gnd signal at the Earth) : the 12Volt circuit of the programmer has been destroyed.

should try this power supply : https://www.ebay.fr/itm/401394476612

the Hilo All-07 (that connect to the parallel port) and the Hilo ALL-07PC that connect to the PC to the SAC-07 ISA card are in fact identical :you can connect the ALL-07PC to a DB-25 gender changer

- the female DSUB25 is converted to Standard male LPT port with a 25 pin gender changer (eBay, bought as fully connected RS232 gender changer).
- Luckily the ALL07 mainboard has a standard drive Molex connector for power.
- The ISA controller card is just a modified LPT port. It provides 5v and 12V, some of the LPT GND wires are mis-used for power.
- Originally power is routed from the small adapter board to the mainboard over a small molex-to-molex bridge.
I think I removed the molex on the small adapter board, to definitely inhibit routing 5/12 V power into the connected PC.
- Any PC power supply can be used for the ALL07. I used a special form factor and tied it to the backside of the ALL07.
If using a regular ATX power supply, the "green" ATX- wire must be connectd to GND to enable power.

Device driver for Win NT/2K/XP written by Hubert Sack (Germany) - Works only with patched software of the ALL03 or EXPRO 60/80 and ALL-07 (parallel port programmer) devices programmers & testers : (available under the terms of the Gnu Public License GPL)

Here Download the Driver Expro.sys in order to use an Hilosystems ALL-07 (parallel port programmer) under Windows XP/2000/NT Operating System.

See how to install the driver with Windows XP Operating system through those shortcuts, and to verify the driver is already installed:
patched program for the HILO ALL07 (ZIP Archive - 2.28MB)

patched program for the HI-LO ALL07 adapter files (ZIP Archive - 3.92MB)

Download file PROG.DEV from the Elektronikladen site.

A "file" (it's the symbolic link to the driver) \\.\EXPRO must be opened in the program, which wants to do I/O on the ports. Therefore only the patched programs in the attachment will work. That's because the I/O permission map at the end of the TSS-descriptor is modified by opening the driver. It's exactly the same way GIVEIO.SYS does, but not for the 64K I/O hole , because the keyboard, mouse etc. must be handled by NT/2K/XP like before.
With that "trick" the access to the port it as fast as under DOS because IOPL does not matter, there is NO interception. The ports 2E0 and 2F0 are not supported by the driver because they may cause a dangerous conflict with an existing COM3/4. The control to the Kernel is fully bypassed!

To install the driver just copy EXPRO.SYS to the SYSTEMROOT\system32\drivers folder and run INSTALLDRIVER. It installs the driver sets the startmode to
AUTOMATIC and starts the driver, so there is no need to restart the PC, but please if it doesn't work first, reboot your computer then test it again.

A short description what the driver does (you can find it in the internet if you search for GIVEIO.SYS from Dale Roberts, my driver uses exacly the same "trick"):

Every task (in NT/2K/XP it's called PROCESS) have it's own TASK STATE SEGMENT descriptor. The TSS register holds the descriptor. You can see the structure of a TASK STATE SEGMENT descriptor in the pictures here. Within the TSS structure is an offset-field which points to a bitmap. This bitmap is the I/O permission map. A "0" (bit, not byte !) allows the process to access the port. For each address there is a bit, so 64kbits for the full I/O address room is needed (8192 * 8 = 65536 = 64k). That's the reason why 2000h bytes of non cacheble memory is allocated by the driver. The bits of the addresses used for port I/O by EXPRO60/80 or ALL03 are cleared, all the other ones are set to "1".
The application only must open the "file". The kernel calls the "open" function of the driver.
It's executed within the context of the application process, but which CPL (current privileg level) of 0 (it's the highest). So the driver is able to "adjust" the I/O permission map of the task (e.g. process) to it's needs. Till now the application can do direct I/O calls to the port. That's all; but it's sounds easier than it really is: To reference a new I/O permission map you must call two undocumented operating system calls.

The patch program does a very simple thing: it adds the necessary code at the end of the original program image and adjusts the header. So after loading the additional code is executed first, which opens the driver to support the I/O permission for the process. There are only two DOS calls used: Open file and Close file. (Shift-Click to download - 8 KB)

To assemble the driver you must use the MASM32. It's free of charge and can be downloaded for the intel web site.

The install program for the driver is compiled via Borland Delphi 3.
The patch program is compiled by using Borland Pascal 7, but it can be compiled under Turbo Pascal 6, too. Only one line must be changed:
FUNCTION uppercase (CONST instr: STRING):STRING;
must be changed to:
FUNCTION uppercase (VAR instr: STRING):STRING;
Borland Pascal 7 allows "CONST" parameters, the resulting code is the same as using "VAR", but the compiler rejects all write references to the parameter because it's declared as read only (constant).

Note than only address 378 of the parallel port is supported by the driver.

In order to make working an HILO ALL-07 under Windows XP Operating System you can use this solution with the virtual machine, and it works good so far.

You can download Microsoft Virtual PC 2007 for free from Microsoft (just google a bit) and install it on your XP Host. I've using XP-Home on the Laptop and the virtual PC say'd that this host os isn't supported, but the install continues flawless so far.

I think they mean you can't get support from Microsoft when you have problems with it, but is there one that really got support from them?

This virtual PC tried first to boot from network on my Notebook, but you can enable the local CDROM from the pulldown menu and enable the use of the
local CDROM (and the physical LPT Port!) there, Reboot the Virtual PC and install Win98 (first Revision in my case ..what is towing a can of worms
afterwards (stoneage IE, that isn't supported from almost any Website with scripting, including Microsoft, Firefox 2.0 is unable to install because of
a DLL Problem).

The Windows Network however worked from begin on, I was able to download an complete IE6.0 Package that included all necessary files to
install on my Unix Host to feed it to the Win98.
That IE updated the Win98 a lot, but I now have an mixed up german and english version running (no problem for me but I think you will get the same problems
with francaise) since I only found an english version.

Next Problem was to find a WINzip that is still running on W98, finally found some Winzip Classic that worked to decompress the ALL07 files.

The Virtual PC has a menu point where you can install some Virtual Host Support to the Target OS.. done that, no real difference..

The ALL07 Programs in the Virtual machine worked flawlessly.

Setup the LPT Port and it goes, no obscure delays or glitches so far.
Found that the prog48.exe in the package of uncompressed files is broken, some salad on the screen.

Hope this was from some interrest for you and think that this is the better way to support the ALL07.

******

PAC-DIP40

This card integrates :

74hc273 (x2) 74hct244 74hct138 (x2) 74hct32 approx. 20 x 2SD1292 darlington transistors approx. 20 resistor networks 2N4403 transistors.

PAC-DIP48

PAC-EP32-8B module

PAC-PLCC44 list of the devices supported by the PAC-PLCC44

PAC-PLCC68 list of the devices supported by the PAC-PLCC68

Software can be found here:
https://elmicro.com/files/hilo/all07a/v923/

Adapters to be used with hilo ALL-07

Adapter for CYPRESS Ultra 37000 CPLD

Adapter for CYPRESS CY37XXX CPLD

A37032 Adapter file for Hilo ALL-07

ADP-MACH1 Adapter

amach1.exe to program AMD MACH130 / MACH131 / MACH230 PLCC-84 See page adp-mach1.htm

ADP-MACH1 AMD MACH130 PLCC-84 EPLD

ADP-MACH1 AMD MACH230 PLCC-84 EPLD

plcc-44 Mach devices adapter schematics (PDF- 226Kb) for MACH110, MACH210/A/AQ, MACH215, MACHLV210/A, MACH111, MACH211, MACH211SP, M4LV-64/32, M4-64/32, M4LV-32/32, M4-32/32, M4A3-32/32, M4A5-32/32, M4A3-64/32, M4A5-64/32

to be used with adapter file AMACH.exe

ADP-MACH2 Adapter to program AMD/ Lattice MACH120, MACH220 & MACH221 EPLDs.

to use with AMACH1.EXE V3.22 adapter file

schematic of the ADP-MACH2 Adapter (PDF- 295Kb)

ADP-68705P adapter to be used with hilo ALL-07

suited to be fixed on Teko case 160 x 83 x 21 mm

http://www.8051faq.com.cn/manager/download/200610632968733920742500.PDF

 A68705p3 Implantatio..> 03-Aug-2011 21:15    10k  PCB component adapter to program MC68705P3 / MC68705R3/U3
 A68705p3 cuivre dess..> 03-Aug-2011 21:15    15k  PCB solder side
 A68705p3 cuivre dess..> 03-Aug-2011 21:15    19k  PCB component side
 A68705p3 schema.pdf     03-Aug-2011 21:16    94k  Diagram of Adapter to program MC68705P3/U3/R3

Gerber files archive for ADP-68705P3 Adapter

to be used with the folowing adapter file a68705.exe to program MOTOROLA MC68705R3, MC68705U3, MC68705R5, MC68705U5 with adapter ADP-68705, MC68705P3, MC68705P5 with adapter ADP-68705/P3, MC68HC705C8, MC68HC705C8.0B67H, MC68HC705C8A with adapter ADP-68HC705 (Release V3.28)

new pcb courtesy Amilcar (Portugal)

 ADP-68HC705 adapter schematics

ADP-68HC705 directory

[   ] A68HC705 Cuivre dessous 14-Jan-2023 10:35    15k  
[   ] A68HC705 Cuivre dessus  14-Jan-2023 10:35    12k  
[   ] A68HC705 Implantation   14-Jan-2023 10:35     9k  
[   ] A68HC705 Percage.pdf    14-Jan-2023 10:36    16k  
[   ] A68HC705_gerbers.zip    14-Jan-2023 10:35    22k  

to be used with the folowing adapter file a68705.exe to program MOTOROLA MC68HC705C8, MC68HC705C8.0B67H, MC68HC705C8A with adapter ADP-68HC705 (Release V3.28)

No Read function available

ADP-68HC705C9

ADP-PIC16

 APic16c Implantation..> 03-Aug-2011 21:16     6k Adapter component to program 28-pin PIC16C5X and 18-pin PIC16 
 APic16c cuivre.pdf      03-Aug-2011 21:16     9k Adapter solder side PIC16 
 Apic16c schema.pdf      03-Aug-2011 21:16    47k Diagram adapter PIC16


Gerber files archive for ADP-PIC16 Adapter 

to be used with apic16.exe adapter file to program Microchip PIC16C54, PIC16C56, PIC16C55, PIC16C57, PIC16C71, PIC16C84 / PIC16LC84, PIC16C64, MTA81010, PIC16C58A, PIC16C74, PIC16C61, PIC16C65, PIC16C620, PIC16C621, PIC16C622, PIC16C73, PIC16C62, PIC16C63, MTA85401, MTA85402, MTA85411, MTA85412, MTA85801, MTA85802, MTA85811 and MTA85812 (release V3.32)

ADP-EPM7032 adapter diagram & software:

a70x.exe to program ALTERA EPM7128LC84 with adapter ADP-EPM7128-PL, EP7064LC68 with adapter ADP-EP7064-PL68, EP7064LC84 with adapter ADP-EPM7064-PL84, EPM7096LC68 with adapter ADP-EPM7096-PL68, EPM7096LC84 with adapter ADP-EPM7096-PL84, EPM7128QC100 with adapter ADP-EPM7128-Q, EPM7096QC100 with adapter ADP-EPM7096-QA, EPM7064QC100 with adapter ADP-EPM7064-Q/QA, EPM7064LC44, EPM7044TC44 with adapter ADP-EPM7064-PL44/TQ (Release V3.16)
for ALTERA MAX7000 EPM7032 family on ALL03 / ALL03A/ PROMA3/ EXPRO programmers.

pinouts See this brochure

Corrected:

other links :

Enable jtag if device has JTAG disabled

https://www.eevblog.com/forum/fpga/programming-(non-jtag)-max7000-devices/?all

https://forum.system-cfg.com/viewtopic.php?f=18&t=13192

ADP7064S Gerber files - 2 pcb separated (.RAR - 270Kb) Courtesy Luis Francisco (Spain)

ADP-7064S-PL84 adapter for Altera PLCC-84 package EPM7064S

Eagle 8.01 sch file courtesy Luis Francisco (Spain)

Eagle 8.01 .BRD file courtesy Luis Francisco (Spain)

GERBER files and Excellon drilling files

adapter file for hilo All-07 (A

gerber files:

pcb1.rar upper pcb

pcb2.rar

ADP-PIC12C5X/-S

Adapter for programming PIC12C508 with an Hilo ALL07 Programmer

for Hilo All-07 use adapter file ampu3.exe (supports Microchip PIC12C508, PIC12C509, PIC12C508(JW), PIC12C509(JW), PIC12C671, PIC12C672, PIC12C671(JW), PIC12C672(JW), PIC12C508A, PIC12C509A, PIC12C508A(JW), PIC12C509(JW), PIC12CE518, PIC12CE519, PIC12CE518(JW), PIC12C519(JW), PIC12C673, PIC12C674.)

I have built my adapter by wiring 2 DIL8 socket in this way:
name A the socket you'll insert into the ALL07 DIL40 zif socket,
name B the socket you'll put the pic12c50x into

You have to wire:
A pin1 -> B pin4
A pin2 NC
A pin3 NC
A pin4 -> B pin8
A pin5 NC
A pin6 -> B pin6 (coincident)
A pin7 -> B pin7 (coincident)
A pin8 -> B pin1

If the wiring is correct, when you insert the A socket into the zif you
can verify that:
ZIF pin17 -> PIC pin4 ZIF pin24 -> PIC pin1
ZIF pin18 NC ZIF pin23 -> PIC pin7
ZIF pin19 NC ZIF pin22 -> PIC pin6
ZIF pin20 -> PIC pin8 ZIF pin21 NC

other explaination of the wiring :

Broches
PAC40 ---Support DIP8
17 --------4 MCLR/Pgm
18 --------NC
19 --------NC
20 --------8 Gnd/masse

21 --------NC
22 --------6 Data IO
23 --------7 Clock
24 --------1 Vcc +5V

#######################################################################

ADP-7064AE

for Altera EPM3032ALC44/TC44, EPM3064ALC44/TC44 and EPM7064AELC44/TC44
This is only for ALL07 (executable is A7064.exe) as ALL03 does NOT know any MAX7000AE nor MAX3000A.
This Adapter is necessary to program CPLDs with locked JTAG pins, so not a simple ISP Adapter.
Schematic contains pinout for all available packages.

#######################################################################

ADP-ATF1500

for Atmel ATF1500/L and ATF1500A/ABV/AL CPLDs. These CPLDs do not know any ISP,
so this Adapter is the only way to program them. ALL03/ALL07 executable(s) is A1500.exe
Schematic contains pinout for all available packages.

#######################################################################

ADP-ATF1504

for Atmel ATF1502AS/ASL and ATF1504AS/ASL CPLDs. This Adapter is necessary to program CPLDs
with locked JTAG pins, so not a simple ISP Adapter. This is only for ALL07 (executable is A1500.exe)
as ALL03 do NOT know any ATF1502/ATF1504 CPLDs.
Schematic contains pinout for PLCC44 and TQFP44 packages.

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ADP-ATF1508

for Atmel ATF1504AS/ASL and ATF1508AS/ASL CPLDs . This Adapter is necessary to program CPLDs
with locked JTAG pins, so not a simple ISP Adapter. ALL03/ALL07 executable(s) is A1500.exe, however
ALL03 does NOT support all package types.

Schematic contains pinout for PLCC84, TQFP100, PQFP100 and PQFP160 packages.

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ADP-PZ5000

for Philips CoolRunner CPLDs Philips PZ3032-/CS/NS, PZ3064, PZ5032-/CS/NS, PZ5064-/CS/NS
and Xilinx XCR3032, XCR3064, XCR5032, XCR5064, XCR3032A, XCR3032C, XCR5032C, XCR3064A, XCR5064C

ALL03 (executable is Apz5032.exe) does NOT know Philips CS/NS nor Xilinx A/C types.
ALL07 knows all of them (executable is Apz5032.exe), however to program Xilinx one have to select the
matching Philips type (the DIE is the same).

This Adapter is necessary to program CPLDs with locked ISP/JTAG pins, so not a simple ISP Adapter.
Schematic contains pinout for PLCC44 and TQFP44 packages.

#######################################################################

ADP-PZ5064

for Philips PZ3064-/CS/NS, PZ5064-/CS/NS, PZ3128-/CS/NS, PZ5128-/CS/NS
and Xilinx XCR3064, XCR5064, XCR3064A, XCR5064C, XCR5128, XCR3128, XCR5128C, XCR3128A

ALL03 (executable is Apz5032.exe) does NOT know Philips CS/NS nor Xilinx A/C types.
ALL07 knows all of them (executable is Apz5032.exe), however to program Xilinx one have to select the
matching Philips type (the DIE is the same).

This Adapter is necessary to program CPLDs with locked ISP/JTAG pins, so not a simple ISP Adapter.
Schematic contains pinout for PLCC68 and PLCC84 packages.

#######################################################################

ADP-PZ5128

for Philips PZ3064-/CS/NS, PZ5064-/CS/NS, PZ3128-/CS/NS, PZ5128-/CS/NS
and Xilinx XCR3064, XCR5064, XCR3064A, XCR5064C, XCR5128, XCR3128, XCR5128C, XCR3128A

ALL07 knows all of them (executable is Apz5032.exe), however to program Xilinx one have to select the
matching Philips type (the DIE is the same).
Adapter is NOT supported by ALL03 at all, however one might use pinout from this Adapters e.g. PQ100
CPLDs and wire it to PLCC84 Adapter (to ADP-PZ5064).

This Adapter is necessary to program CPLDs with locked ISP/JTAG pins, so not a simple ISP Adapter.
Schematic contains pinout for PQ100, VQ100, TQ100, TQ128 and PQ160 packages.
Note: due bonding differences Adapter for PQ100 need a jumper to select type, where others not.

#######################################################################

Information given in this schematic is correct
uf diodes are UF4003 , all other diodes are 1N4148 and transistors PN2222A
ADP-PLS100

https://github.com/nobodyisinocent/PLS100-Adapter See all details to build the adapter ADP-PLS100

https://www.reichelt.de/de/fr/transistor-npn-to-18-40-v-0-8-a-0-5-w-2n-2222a-p1968.html
https://www.reichelt.de/de/fr/diode-de-redressement-ultrarapide-do41-200-v-1-a-uf-4003-p42034.html
https://www.reichelt.de/de/fr/diode-de-commutation-100-v-150-ma-do-35-1n-4148-p1730.html

For Philips / Signetics PLDs PLS100, PLS101, 82S100, 82S101
For ALL03 the executable is apls100.exe, for ALL07 it is apls100.exe

Original ADP-PLS100 have ZIF32 socket populated, however i have changed my schematic
to ZIF28 as the IC itself is anyway in DIP28.

D1,D2 are some ultra fast protection diodes UF1005 (PDF- 415Kb)
measure of all diodes with a semiconductor tester "PEAK atlas DCA55" gives the following results:
Tests are incircuit, so non-sense results for d5,6,7,8 :
d1, d2 "UF1D-005": Forward voltage 0,56v @ 4.8 mA
d3, d4: Forward voltage 0.64v @4.7mA
d5, d6, d7, d8: Forward voltage 4V @ 1mA

This device does not detect zener junctions however, test current is too low.
But they look not as Zeners at all.

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ADP-ISP22V10

For Lattice ispGAL22V10, executable for ALL03 is agds.exe and for ALL07 is agds.exe
This Adapter is necessary to program ispGAL22V10 in ISP mode, which is unique
for Lattice ispGALs only, however this IC can be programmed as well in GAL mode
(simply use any 22V10 GAL mode/programmer).

Schematic contains pinout for PLCC28 and SSOP28 packages.

#######################################################################

ADP-ISPGDS18

For Lattice ispGDS18, executable for ALL03 is agds.exe and for ALL07 is agds.exe
This Adapter is necessary only for ispGDS18, other ispGDS types (ispGDS14 and ispGDS22)
can be programmed without any special adapter (no idea why it is like that).

Schematic contains pinout for DIP24

#######################################################################

#######################################################################

ADP-8796PGA

ADP-8796PLCC

For cute Intel MSC-96 MCUs 8796BH/JC, 8797BH/JF, 87C196KB, 87C196KC and 87C/L196KD.
The executable for ALL03 is A8796.exe and for ALL07 is A8796.exe
The schematic of PGA version is made of actual adapter, see pictures.
The schematic of PLCC version is based on datasheets / pgm specs only. It conatins an jumper to select between 879x and 8719x,
where on real ADP-8796PLCC there are two transistors. However this does not matter at all for the function of the PLCC adapter.

Schematics for both PGA68 and PLCC68 packages.

#######################################################################

ADP-PLCC-PAL

This is a very simple for all PALs/GALs in PLCC28 and PLCC20. It has been discontinued long time ago,
today one have to buy 3 other Adapters to get together the functionality of ADP-PLCC-PAL:
CNV-PLCC-PAL28A
CNV-PLCC-PAL28B
CNV-PLCC-PAL20


#######################################################################

ADP-XC7336-Q

For Xilinx XC7318(-/A/Q), XC7336(-/A/Q), XC9536 and XC9536XL in QFP44.

There are multiple executables:
for ALL03 and XC7318(-/A/Q), XC7336(-/A/Q) it is Axc7236.exe
for ALL03 and XC9536 it is Axc9500.exe
ALL03 does not support XC9500XL series.

for ALL07 and XC7318(-/A/Q), XC7336(-/A/Q) it is Axc7236.exe
for ALL07 and XC9536 it is Axc9500.exe
for ALL07 and XC9536XL it is Axc95xl.exe

The RP1 on the schematic can be everything between 0R and 100R. I don't know what values
has been used on the original HiLo adapter, but based on Xilinx Programming Specification it have
to be 0R for XC7xxx series up to "soft GND" (pulldown) for XC9500XL series.
On my test adapter i have used 0R, that worked with all CPLDs.

There is bug in HiLo ALL07 software Axc95xl.exe, v3.01 . One can select (8) XC9536XL (VQFP44)
but this is actually for VQP64 version. Older versions of Axc95xl.exe does not support XC9636XL in QFP44 at all.
To program them one have to wire QFP44 IC to PLCC44 and select then XC9536XL (PLCC44) in the Axc95xl.exe.

There seems to be bug in Axc9500.exe executable, one can not burn "write secure" fuse on XC9536.
In the Xilinx XC9500 Programming Specification one can read that :

If the user elects to use both Read and Write Secure, the Read Security addresses must be
programmed first, followed by the Write Security addresses. Do not power down between
programming of the Read and Write Secure addresses or between Program and Verify operations.

However the Axc9500.exe executable is allowing only "read secure" in Auto mode, but no "write secure".
When selected manually from "Security fuse blow", the "write secure" is not running "read secure" first (as described above),
but only doing the "write secure" which of course fails. Luckily "read secure" is the typical kind of security fuse that one need:

The device supports two types of security; one to protect the design from being copied (read secure),
and one to protect the device from being erased and/or reprogrammed (write secure).

#######################################################################

ADP-XC7354-PL

For Xilinx XC7318(-/A/Q), XC7336(-/A/Q), XC7354, XC9536 and XC9536XL in PLCC44.

There are multiple executables:
for ALL03 and XC7318(-/A/Q), XC7336(-/A/Q), XC7354 it is Axc7236.exe
for ALL03 and XC9536 it is Axc9500.exe
ALL03 does not support XC9500XL series.

for ALL07 and XC7318(-/A/Q), XC7336(-/A/Q), XC7354 it is Axc7236.exe
for ALL07 and XC9536 it is Axc9500.exe
for ALL07 and XC9536XL it is Axc95xl.exe

The RP1 on the schematic can be everything between 0R and 100R. I don't know what values
has been used on the original HiLo adapter, but based on Xilinx Programming Specification it have
to be 0R for XC7xxx series up to "soft GND" (pulldown) for XC9500XL series.
On my test adapter i have used 0R, that worked with all CPLDs.

Same as for "ADP-XC7336-Q" adapter: There seems to be bug in Axc9500.exe executable, one can not
burn "write secure" fuse on XC9536. In the Xilinx XC9500 Programming Specification one can read that :

If the user elects to use both Read and Write Secure, the Read Security addresses must be
programmed first, followed by the Write Security addresses. Do not power down between
programming of the Read and Write Secure addresses or between Program and Verify operations.

However the Axc9500.exe executable is allowing only "read secure" in Auto mode, but no "write secure".
When selected manually from "Security fuse blow", the "write secure" is not running "read secure" first (as described above),
but only doing the "write secure" which of course fails. Luckily "read secure" is the typical kind of security fuse that one need:

The device supports two types of security; one to protect the design from being copied (read secure),
and one to protect the device from being erased and/or reprogrammed (write secure).
#######################################################################

PCB for ADP-29f800PS adapter for HILO programmers
Download here top.eps and bottom.eps - Available in PDF format : adp29F800.pdf

TOP view

BOTTOM view

ADP-29F800-PS adapter wiring (PDF - 16Kb)

ADP29F800-PS pinout (TXT -1Kb)

Adapter ADP-RM1A to test SIMM30 / SIP32 ram-modules from 256Kb to 8Mb

to use with this software (20 Kb)

Pin Name Description 1 VCC +5V 2 /CAS Column Address Strobe 3 DQ0 Data 0 4 A0 Address 0 5 A1 Address 1 6 DQ1 Data 1 7 A2 Address 2 8 A3 Address 3 9 GND Ground 10 DQ2 Data 2 11 A4 Address 4 12 A5 Address 5 13 DQ3 Data 3 14 A6 Address 6 15 A7 Address 7 16 DQ4 Data 4 17 A8 Address 8 18 A9 Address 9 19 A10 Address 10 20 DQ5 Data 5 21 /WE Write Enable 22 GND Ground 23 DQ6 Data 6 24 A11 Address 11 25 DQ7 Data 7 26 QP Data Parity Out 27 /RAS Row Address Strobe 28 /CASP The line is the /CAS line for the parity RAM on the card. The parity generator circuitry of the motherboards needed a longer time to generate a parity bit, so the CAS for the extra DRAM had be controlled seperately, hence, the extra /CAS line. (Source: Tom Walsh). 29 DP Data Parity In 30 VCC +5V Note: SIMM above is a 4MBx9. QP & DP is N/C on SIMMs without parity. A9 is N/C on 256kB. A10 is N/C on 256kB & 1MB. A11 is N/C on 256kB, 1MB & 4MB.	SIMM 30 PINS DATA SHEET
ARM1 Adapter schematics & pcb (PDF - 2 pages - 72Kb) ARM1 Adapter pcb Gerber files (ZIP Archive - 7.64Mb)

SIMM30 Adapter

simm30 adapter schematic (PDF-17Kb)

simm30 adapter pcb (PDF-54Kb)

simm30 adapter (Eagle files -52Kb)

SRAM that can be tested with hilo all-07

DRAM that can be tested with hilo all-07

http://www.tabalabs.com.br/eletronica/reftec/read2364.gif test socket to read a 2364 as a 2764 with an eprom burner ;
with an hilo programmer you can read a 2364 EPROM by selecting device Motorola 68764

Siemens SDA2506 serial eeprom programming adapter

Cypress CY7C344-25JC plcc-28 to dip-28 programming adapter

ADP-1810PLCC Adapter

a1810.exe to program Altera EP1810-35/45, EP1830-20/-25/-30 to use with adapter ADP-1810PLCC/PGA

adp1810-pinout_mapping.txt

links

http://www.textool.cn/ production sockets (YAMAICHI, ENPLAS, Wells-cti, sockets SOP) from Shenzhen,China

http://retrocmp.com/stories/trying-to-setup-an-all07-prommer

https://www.aprilog.com/ Component Adapters & Test/Burn-in ZIF Sockets

If you look forward for other information about this topic, do not hesitate to contact me by e-mail at: matthieu.benoit@free.fr .
Important Notice: Also if you have any data about this topic, do not hesitate to contribute to this page.

Si vous recherchez des informations pour ce sujet, vous pouvez me contacter par e-mail : matthieu.benoit@free.fr . De même si vous avez des informations sur ce sujet, n'hésitez pas à contribuer à cette page.

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8 juillet, 2023
matthieu.benoit@free.fr